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| 1 /* | |
| 2 * Copyright (c) 2011 The WebRTC project authors. All Rights Reserved. | |
| 3 * | |
| 4 * Use of this source code is governed by a BSD-style license | |
| 5 * that can be found in the LICENSE file in the root of the source | |
| 6 * tree. An additional intellectual property rights grant can be found | |
| 7 * in the file PATENTS. All contributing project authors may | |
| 8 * be found in the AUTHORS file in the root of the source tree. | |
| 9 */ | |
| 10 | |
| 11 #include "webrtc/media/base/cpuid.h" | |
| 12 | |
| 13 #include <iostream> | |
| 14 | |
| 15 #include "webrtc/base/basictypes.h" | |
| 16 #include "webrtc/base/gunit.h" | |
| 17 #include "webrtc/base/systeminfo.h" | |
| 18 | |
| 19 TEST(CpuInfoTest, CpuId) { | |
| 20 LOG(LS_INFO) << "ARM: " | |
| 21 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasARM); | |
| 22 LOG(LS_INFO) << "NEON: " | |
| 23 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasNEON); | |
| 24 LOG(LS_INFO) << "X86: " | |
| 25 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasX86); | |
| 26 LOG(LS_INFO) << "SSE2: " | |
| 27 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE2); | |
| 28 LOG(LS_INFO) << "SSSE3: " | |
| 29 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSSE3); | |
| 30 LOG(LS_INFO) << "SSE41: " | |
| 31 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41); | |
| 32 LOG(LS_INFO) << "SSE42: " | |
| 33 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE42); | |
| 34 LOG(LS_INFO) << "AVX: " | |
| 35 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasAVX); | |
| 36 bool has_arm = cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasARM); | |
| 37 bool has_x86 = cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasX86); | |
| 38 EXPECT_FALSE(has_arm && has_x86); | |
| 39 } | |
| 40 | |
| 41 TEST(CpuInfoTest, IsCoreIOrBetter) { | |
| 42 bool core_i_or_better = cricket::IsCoreIOrBetter(); | |
| 43 // Tests the function is callable. Run on known hardware to confirm. | |
| 44 LOG(LS_INFO) << "IsCoreIOrBetter: " << core_i_or_better; | |
| 45 | |
| 46 // All Core I CPUs have SSE 4.1. | |
| 47 if (core_i_or_better) { | |
| 48 EXPECT_TRUE(cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41)); | |
| 49 EXPECT_TRUE(cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSSE3)); | |
| 50 } | |
| 51 | |
| 52 // All CPUs that lack SSE 4.1 are not Core I CPUs. | |
| 53 if (!cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41)) { | |
| 54 EXPECT_FALSE(core_i_or_better); | |
| 55 } | |
| 56 } | |
| 57 | |
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