Using fake clock for TURN port tests and un-disabling some tests.

webrtc/base/virtualsocketserver.cc

Index: webrtc/base/virtualsocketserver.cc
diff --git a/webrtc/base/virtualsocketserver.cc b/webrtc/base/virtualsocketserver.cc
index d871d4c137d4690369d37a3e69b6b0c584fc7bfd..ef3c6e53295e87c690771d9873bb40cf7cd7eb7a 100644
--- a/webrtc/base/virtualsocketserver.cc
+++ b/webrtc/base/virtualsocketserver.cc
@@ -771,8 +771,11 @@ int VirtualSocketServer::Connect(VirtualSocket* socket,
 
 bool VirtualSocketServer::Disconnect(VirtualSocket* socket) {
   if (socket) {
+    // If we simulate packets being delayed, we should simulate the
+    // equivalent of a FIN being delayed as well.
+    uint32_t delay = GetRandomTransitDelay();
     // Remove the mapping.
-    msg_queue_->Post(RTC_FROM_HERE, socket, MSG_ID_DISCONNECT);
+    msg_queue_->PostDelayed(RTC_FROM_HERE, delay, socket, MSG_ID_DISCONNECT);
     return true;
   }
   return false;