Clang format changes

webrtc/modules/audio_processing/aec/aec_core_neon.c

 /*
  *  Copyright (c) 2014 The WebRTC project authors. All Rights Reserved.
  *
  *  Use of this source code is governed by a BSD-style license
  *  that can be found in the LICENSE file in the root of the source
  *  tree. An additional intellectual property rights grant can be found
  *  in the file PATENTS.  All contributing project authors may
  *  be found in the AUTHORS file in the root of the source tree.
  */
 
@@ skipping 16 matching lines @@
 enum { kFloatExponentShift = 23 };
 
 __inline static float MulRe(float aRe, float aIm, float bRe, float bIm) {
   return aRe * bRe - aIm * bIm;
 }
 
 __inline static float MulIm(float aRe, float aIm, float bRe, float bIm) {
   return aRe * bIm + aIm * bRe;
 }
 
-static void FilterFarNEON(
-    int num_partitions,
-    int x_fft_buf_block_pos,
-    float x_fft_buf[2][kExtendedNumPartitions * PART_LEN1],
-    float h_fft_buf[2][kExtendedNumPartitions * PART_LEN1],
-    float y_fft[2][PART_LEN1]) {
+static void FilterFarNEON(int num_partitions,
+                          int x_fft_buf_block_pos,
+                          float x_fft_buf[2]
+                                         [kExtendedNumPartitions * PART_LEN1],
+                          float h_fft_buf[2]
+                                         [kExtendedNumPartitions * PART_LEN1],
+                          float y_fft[2][PART_LEN1]) {
   int i;
   for (i = 0; i < num_partitions; i++) {
     int j;
     int xPos = (i + x_fft_buf_block_pos) * PART_LEN1;
     int pos = i * PART_LEN1;
     // Check for wrap
     if (i + x_fft_buf_block_pos >= num_partitions) {
       xPos -= num_partitions * PART_LEN1;
     }
 
     // vectorized code (four at once)
     for (j = 0; j + 3 < PART_LEN1; j += 4) {
       const float32x4_t x_fft_buf_re = vld1q_f32(&x_fft_buf[0][xPos + j]);
       const float32x4_t x_fft_buf_im = vld1q_f32(&x_fft_buf[1][xPos + j]);
       const float32x4_t h_fft_buf_re = vld1q_f32(&h_fft_buf[0][pos + j]);
       const float32x4_t h_fft_buf_im = vld1q_f32(&h_fft_buf[1][pos + j]);
       const float32x4_t y_fft_re = vld1q_f32(&y_fft[0][j]);
       const float32x4_t y_fft_im = vld1q_f32(&y_fft[1][j]);
       const float32x4_t a = vmulq_f32(x_fft_buf_re, h_fft_buf_re);
       const float32x4_t e = vmlsq_f32(a, x_fft_buf_im, h_fft_buf_im);
       const float32x4_t c = vmulq_f32(x_fft_buf_re, h_fft_buf_im);
       const float32x4_t f = vmlaq_f32(c, x_fft_buf_im, h_fft_buf_re);
       const float32x4_t g = vaddq_f32(y_fft_re, e);
       const float32x4_t h = vaddq_f32(y_fft_im, f);
       vst1q_f32(&y_fft[0][j], g);
       vst1q_f32(&y_fft[1][j], h);
     }
     // scalar code for the remaining items.
     for (; j < PART_LEN1; j++) {
-      y_fft[0][j] += MulRe(x_fft_buf[0][xPos + j],
-                           x_fft_buf[1][xPos + j],
-                           h_fft_buf[0][pos + j],
-                           h_fft_buf[1][pos + j]);
-      y_fft[1][j] += MulIm(x_fft_buf[0][xPos + j],
-                           x_fft_buf[1][xPos + j],
-                           h_fft_buf[0][pos + j],
-                           h_fft_buf[1][pos + j]);
+      y_fft[0][j] += MulRe(x_fft_buf[0][xPos + j], x_fft_buf[1][xPos + j],
+                           h_fft_buf[0][pos + j], h_fft_buf[1][pos + j]);
+      y_fft[1][j] += MulIm(x_fft_buf[0][xPos + j], x_fft_buf[1][xPos + j],
+                           h_fft_buf[0][pos + j], h_fft_buf[1][pos + j]);
     }
   }
 }
 
 // ARM64's arm_neon.h has already defined vdivq_f32 vsqrtq_f32.
-#if !defined (WEBRTC_ARCH_ARM64)
+#if !defined(WEBRTC_ARCH_ARM64)
 static float32x4_t vdivq_f32(float32x4_t a, float32x4_t b) {
   int i;
   float32x4_t x = vrecpeq_f32(b);
   // from arm documentation
   // The Newton-Raphson iteration:
   //     x[n+1] = x[n] * (2 - d * x[n])
   // converges to (1/d) if x0 is the result of VRECPE applied to d.
   //
   // Note: The precision did not improve after 2 iterations.
   for (i = 0; i < 2; i++) {
     x = vmulq_f32(vrecpsq_f32(b, x), x);
   }
   // a/b = a*(1/b)
   return vmulq_f32(a, x);
 }
 
 static float32x4_t vsqrtq_f32(float32x4_t s) {
   int i;
   float32x4_t x = vrsqrteq_f32(s);
 
   // Code to handle sqrt(0).
   // If the input to sqrtf() is zero, a zero will be returned.
   // If the input to vrsqrteq_f32() is zero, positive infinity is returned.
   const uint32x4_t vec_p_inf = vdupq_n_u32(0x7F800000);
   // check for divide by zero
   const uint32x4_t div_by_zero = vceqq_u32(vec_p_inf, vreinterpretq_u32_f32(x));
   // zero out the positive infinity results
-  x = vreinterpretq_f32_u32(vandq_u32(vmvnq_u32(div_by_zero),
-                                      vreinterpretq_u32_f32(x)));
+  x = vreinterpretq_f32_u32(
+      vandq_u32(vmvnq_u32(div_by_zero), vreinterpretq_u32_f32(x)));
   // from arm documentation
   // The Newton-Raphson iteration:
   //     x[n+1] = x[n] * (3 - d * (x[n] * x[n])) / 2)
   // converges to (1/√d) if x0 is the result of VRSQRTE applied to d.
   //
   // Note: The precision did not improve after 2 iterations.
   for (i = 0; i < 2; i++) {
     x = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x, x), s), x);
   }
   // sqrt(s) = s * 1/sqrt(s)
-  return vmulq_f32(s, x);;
+  return vmulq_f32(s, x);
+  ;
 }
 #endif  // WEBRTC_ARCH_ARM64
 
 static void ScaleErrorSignalNEON(int extended_filter_enabled,
                                  float normal_mu,
                                  float normal_error_threshold,
                                  float x_pow[PART_LEN1],
                                  float ef[2][PART_LEN1]) {
   const float mu = extended_filter_enabled ? kExtendedMu : normal_mu;
-  const float error_threshold = extended_filter_enabled ?
-      kExtendedErrorThreshold : normal_error_threshold;
+  const float error_threshold = extended_filter_enabled
+                                    ? kExtendedErrorThreshold
+                                    : normal_error_threshold;
   const float32x4_t k1e_10f = vdupq_n_f32(1e-10f);
   const float32x4_t kMu = vmovq_n_f32(mu);
   const float32x4_t kThresh = vmovq_n_f32(error_threshold);
   int i;
   // vectorized code (four at once)
   for (i = 0; i + 3 < PART_LEN1; i += 4) {
     const float32x4_t x_pow_local = vld1q_f32(&x_pow[i]);
     const float32x4_t ef_re_base = vld1q_f32(&ef[0][i]);
     const float32x4_t ef_im_base = vld1q_f32(&ef[1][i]);
     const float32x4_t xPowPlus = vaddq_f32(x_pow_local, k1e_10f);
     float32x4_t ef_re = vdivq_f32(ef_re_base, xPowPlus);
     float32x4_t ef_im = vdivq_f32(ef_im_base, xPowPlus);
     const float32x4_t ef_re2 = vmulq_f32(ef_re, ef_re);
     const float32x4_t ef_sum2 = vmlaq_f32(ef_re2, ef_im, ef_im);
     const float32x4_t absEf = vsqrtq_f32(ef_sum2);
     const uint32x4_t bigger = vcgtq_f32(absEf, kThresh);
     const float32x4_t absEfPlus = vaddq_f32(absEf, k1e_10f);
     const float32x4_t absEfInv = vdivq_f32(kThresh, absEfPlus);
     uint32x4_t ef_re_if = vreinterpretq_u32_f32(vmulq_f32(ef_re, absEfInv));
     uint32x4_t ef_im_if = vreinterpretq_u32_f32(vmulq_f32(ef_im, absEfInv));
-    uint32x4_t ef_re_u32 = vandq_u32(vmvnq_u32(bigger),
-                                     vreinterpretq_u32_f32(ef_re));
-    uint32x4_t ef_im_u32 = vandq_u32(vmvnq_u32(bigger),
-                                     vreinterpretq_u32_f32(ef_im));
+    uint32x4_t ef_re_u32 =
+        vandq_u32(vmvnq_u32(bigger), vreinterpretq_u32_f32(ef_re));
+    uint32x4_t ef_im_u32 =
+        vandq_u32(vmvnq_u32(bigger), vreinterpretq_u32_f32(ef_im));
     ef_re_if = vandq_u32(bigger, ef_re_if);
     ef_im_if = vandq_u32(bigger, ef_im_if);
     ef_re_u32 = vorrq_u32(ef_re_u32, ef_re_if);
     ef_im_u32 = vorrq_u32(ef_im_u32, ef_im_if);
     ef_re = vmulq_f32(vreinterpretq_f32_u32(ef_re_u32), kMu);
     ef_im = vmulq_f32(vreinterpretq_f32_u32(ef_im_u32), kMu);
     vst1q_f32(&ef[0][i], ef_re);
     vst1q_f32(&ef[1][i], ef_im);
   }
   // scalar code for the remaining items.
@@ skipping 46 matching lines @@
       const float32x4_t e = vmlaq_f32(a, x_fft_buf_im, e_fft_im);
       const float32x4_t c = vmulq_f32(x_fft_buf_re, e_fft_im);
       const float32x4_t f = vmlsq_f32(c, x_fft_buf_im, e_fft_re);
       // Interleave real and imaginary parts.
       const float32x4x2_t g_n_h = vzipq_f32(e, f);
       // Store
       vst1q_f32(&fft[2 * j + 0], g_n_h.val[0]);
       vst1q_f32(&fft[2 * j + 4], g_n_h.val[1]);
     }
     // ... and fixup the first imaginary entry.
-    fft[1] = MulRe(x_fft_buf[0][xPos + PART_LEN],
-                   -x_fft_buf[1][xPos + PART_LEN],
-                   e_fft[0][PART_LEN],
-                   e_fft[1][PART_LEN]);
+    fft[1] =
+        MulRe(x_fft_buf[0][xPos + PART_LEN], -x_fft_buf[1][xPos + PART_LEN],
+              e_fft[0][PART_LEN], e_fft[1][PART_LEN]);
 
     aec_rdft_inverse_128(fft);
     memset(fft + PART_LEN, 0, sizeof(float) * PART_LEN);
 
     // fft scaling
     {
       const float scale = 2.0f / PART_LEN2;
       const float32x4_t scale_ps = vmovq_n_f32(scale);
       for (j = 0; j < PART_LEN; j += 4) {
         const float32x4_t fft_ps = vld1q_f32(&fft[j]);
@@ skipping 44 matching lines @@
 
     // Compute n.
     //    This is done by masking the exponent, shifting it into the top bit of
     //    the mantissa, putting eight into the biased exponent (to shift/
     //    compensate the fact that the exponent has been shifted in the top/
     //    fractional part and finally getting rid of the implicit leading one
     //    from the mantissa by substracting it out.
     const uint32x4_t vec_float_exponent_mask = vdupq_n_u32(0x7F800000);
     const uint32x4_t vec_eight_biased_exponent = vdupq_n_u32(0x43800000);
     const uint32x4_t vec_implicit_leading_one = vdupq_n_u32(0x43BF8000);
-    const uint32x4_t two_n = vandq_u32(vreinterpretq_u32_f32(a),
-                                       vec_float_exponent_mask);
+    const uint32x4_t two_n =
+        vandq_u32(vreinterpretq_u32_f32(a), vec_float_exponent_mask);
     const uint32x4_t n_1 = vshrq_n_u32(two_n, kShiftExponentIntoTopMantissa);
     const uint32x4_t n_0 = vorrq_u32(n_1, vec_eight_biased_exponent);
     const float32x4_t n =
         vsubq_f32(vreinterpretq_f32_u32(n_0),
                   vreinterpretq_f32_u32(vec_implicit_leading_one));
     // Compute y.
     const uint32x4_t vec_mantissa_mask = vdupq_n_u32(0x007FFFFF);
     const uint32x4_t vec_zero_biased_exponent_is_one = vdupq_n_u32(0x3F800000);
-    const uint32x4_t mantissa = vandq_u32(vreinterpretq_u32_f32(a),
-                                          vec_mantissa_mask);
-    const float32x4_t y =
-        vreinterpretq_f32_u32(vorrq_u32(mantissa,
-                                        vec_zero_biased_exponent_is_one));
+    const uint32x4_t mantissa =
+        vandq_u32(vreinterpretq_u32_f32(a), vec_mantissa_mask);
+    const float32x4_t y = vreinterpretq_f32_u32(
+        vorrq_u32(mantissa, vec_zero_biased_exponent_is_one));
     // Approximate log2(y) ~= (y - 1) * pol5(y).
     //    pol5(y) = C5 * y^5 + C4 * y^4 + C3 * y^3 + C2 * y^2 + C1 * y + C0
     const float32x4_t C5 = vdupq_n_f32(-3.4436006e-2f);
     const float32x4_t C4 = vdupq_n_f32(3.1821337e-1f);
     const float32x4_t C3 = vdupq_n_f32(-1.2315303f);
     const float32x4_t C2 = vdupq_n_f32(2.5988452f);
     const float32x4_t C1 = vdupq_n_f32(-3.3241990f);
     const float32x4_t C0 = vdupq_n_f32(3.1157899f);
     float32x4_t pol5_y = C5;
     pol5_y = vmlaq_f32(C4, y, pol5_y);
@@ skipping 68 matching lines @@
   const float32x4_t vec_one = vdupq_n_f32(1.0f);
   const float32x4_t vec_minus_one = vdupq_n_f32(-1.0f);
   const float32x4_t vec_overDriveSm = vmovq_n_f32(aec->overDriveSm);
 
   // vectorized code (four at once)
   for (i = 0; i + 3 < PART_LEN1; i += 4) {
     // Weight subbands
     float32x4_t vec_hNl = vld1q_f32(&hNl[i]);
     const float32x4_t vec_weightCurve = vld1q_f32(&WebRtcAec_weightCurve[i]);
     const uint32x4_t bigger = vcgtq_f32(vec_hNl, vec_hNlFb);
-    const float32x4_t vec_weightCurve_hNlFb = vmulq_f32(vec_weightCurve,
-                                                        vec_hNlFb);
+    const float32x4_t vec_weightCurve_hNlFb =
+        vmulq_f32(vec_weightCurve, vec_hNlFb);
     const float32x4_t vec_one_weightCurve = vsubq_f32(vec_one, vec_weightCurve);
-    const float32x4_t vec_one_weightCurve_hNl = vmulq_f32(vec_one_weightCurve,
-                                                          vec_hNl);
-    const uint32x4_t vec_if0 = vandq_u32(vmvnq_u32(bigger),
-                                         vreinterpretq_u32_f32(vec_hNl));
+    const float32x4_t vec_one_weightCurve_hNl =
+        vmulq_f32(vec_one_weightCurve, vec_hNl);
+    const uint32x4_t vec_if0 =
+        vandq_u32(vmvnq_u32(bigger), vreinterpretq_u32_f32(vec_hNl));
     const float32x4_t vec_one_weightCurve_add =
         vaddq_f32(vec_weightCurve_hNlFb, vec_one_weightCurve_hNl);
     const uint32x4_t vec_if1 =
         vandq_u32(bigger, vreinterpretq_u32_f32(vec_one_weightCurve_add));
 
     vec_hNl = vreinterpretq_f32_u32(vorrq_u32(vec_if0, vec_if1));
 
     {
       const float32x4_t vec_overDriveCurve =
           vld1q_f32(&WebRtcAec_overDriveCurve[i]);
@@ skipping 91 matching lines @@
 //  - sxd : cross-PSD of near-end and far-end
 //
 // In addition to updating the PSDs, also the filter diverge state is determined
 // upon actions are taken.
 static void SmoothedPSD(AecCore* aec,
                         float efw[2][PART_LEN1],
                         float dfw[2][PART_LEN1],
                         float xfw[2][PART_LEN1],
                         int* extreme_filter_divergence) {
   // Power estimate smoothing coefficients.
-  const float* ptrGCoh = aec->extended_filter_enabled
-      ? WebRtcAec_kExtendedSmoothingCoefficients[aec->mult - 1]
-      : WebRtcAec_kNormalSmoothingCoefficients[aec->mult - 1];
+  const float* ptrGCoh =
+      aec->extended_filter_enabled
+          ? WebRtcAec_kExtendedSmoothingCoefficients[aec->mult - 1]
+          : WebRtcAec_kNormalSmoothingCoefficients[aec->mult - 1];
   int i;
   float sdSum = 0, seSum = 0;
-  const float32x4_t vec_15 =  vdupq_n_f32(WebRtcAec_kMinFarendPSD);
+  const float32x4_t vec_15 = vdupq_n_f32(WebRtcAec_kMinFarendPSD);
   float32x4_t vec_sdSum = vdupq_n_f32(0.0f);
   float32x4_t vec_seSum = vdupq_n_f32(0.0f);
 
   for (i = 0; i + 3 < PART_LEN1; i += 4) {
     const float32x4_t vec_dfw0 = vld1q_f32(&dfw[0][i]);
     const float32x4_t vec_dfw1 = vld1q_f32(&dfw[1][i]);
     const float32x4_t vec_efw0 = vld1q_f32(&efw[0][i]);
     const float32x4_t vec_efw1 = vld1q_f32(&efw[1][i]);
     const float32x4_t vec_xfw0 = vld1q_f32(&xfw[0][i]);
     const float32x4_t vec_xfw1 = vld1q_f32(&xfw[1][i]);
@@ skipping 42 matching lines @@
       vst2q_f32(&aec->sxd[i][0], vec_sxd);
     }
 
     vec_sdSum = vaddq_f32(vec_sdSum, vec_sd);
     vec_seSum = vaddq_f32(vec_seSum, vec_se);
   }
   {
     float32x2_t vec_sdSum_total;
     float32x2_t vec_seSum_total;
     // A B C D
-    vec_sdSum_total = vpadd_f32(vget_low_f32(vec_sdSum),
-                                vget_high_f32(vec_sdSum));
-    vec_seSum_total = vpadd_f32(vget_low_f32(vec_seSum),
-                                vget_high_f32(vec_seSum));
+    vec_sdSum_total =
+        vpadd_f32(vget_low_f32(vec_sdSum), vget_high_f32(vec_sdSum));
+    vec_seSum_total =
+        vpadd_f32(vget_low_f32(vec_seSum), vget_high_f32(vec_seSum));
     // A+B C+D
     vec_sdSum_total = vpadd_f32(vec_sdSum_total, vec_sdSum_total);
     vec_seSum_total = vpadd_f32(vec_seSum_total, vec_seSum_total);
     // A+B+C+D A+B+C+D
     sdSum = vget_lane_f32(vec_sdSum_total, 0);
     seSum = vget_lane_f32(vec_seSum_total, 0);
   }
 
   // scalar code for the remaining items.
   for (; i < PART_LEN1; i++) {
     aec->sd[i] = ptrGCoh[0] * aec->sd[i] +
                  ptrGCoh[1] * (dfw[0][i] * dfw[0][i] + dfw[1][i] * dfw[1][i]);
     aec->se[i] = ptrGCoh[0] * aec->se[i] +
                  ptrGCoh[1] * (efw[0][i] * efw[0][i] + efw[1][i] * efw[1][i]);
     // We threshold here to protect against the ill-effects of a zero farend.
     // The threshold is not arbitrarily chosen, but balances protection and
     // adverse interaction with the algorithm's tuning.
     // TODO(bjornv): investigate further why this is so sensitive.
-    aec->sx[i] =
-        ptrGCoh[0] * aec->sx[i] +
-        ptrGCoh[1] * WEBRTC_SPL_MAX(
-            xfw[0][i] * xfw[0][i] + xfw[1][i] * xfw[1][i],
-            WebRtcAec_kMinFarendPSD);
+    aec->sx[i] = ptrGCoh[0] * aec->sx[i] +
+                 ptrGCoh[1] * WEBRTC_SPL_MAX(
+                                  xfw[0][i] * xfw[0][i] + xfw[1][i] * xfw[1][i],
+                                  WebRtcAec_kMinFarendPSD);
 
     aec->sde[i][0] =
         ptrGCoh[0] * aec->sde[i][0] +
         ptrGCoh[1] * (dfw[0][i] * efw[0][i] + dfw[1][i] * efw[1][i]);
     aec->sde[i][1] =
         ptrGCoh[0] * aec->sde[i][1] +
         ptrGCoh[1] * (dfw[0][i] * efw[1][i] - dfw[1][i] * efw[0][i]);
 
     aec->sxd[i][0] =
         ptrGCoh[0] * aec->sxd[i][0] +
@@ skipping 24 matching lines @@
     // A B C D
     float32x4_t vec_sqrtHanning_rev =
         vld1q_f32(&WebRtcAec_sqrtHanning[PART_LEN - i - 3]);
     // B A D C
     vec_sqrtHanning_rev = vrev64q_f32(vec_sqrtHanning_rev);
     // D C B A
     vec_sqrtHanning_rev = vcombine_f32(vget_high_f32(vec_sqrtHanning_rev),
                                        vget_low_f32(vec_sqrtHanning_rev));
     vst1q_f32(&x_windowed[i], vmulq_f32(vec_Buf1, vec_sqrtHanning));
     vst1q_f32(&x_windowed[PART_LEN + i],
-            vmulq_f32(vec_Buf2, vec_sqrtHanning_rev));
+              vmulq_f32(vec_Buf2, vec_sqrtHanning_rev));
   }
 }
 
 // Puts fft output data into a complex valued array.
 static void StoreAsComplexNEON(const float* data,
                                float data_complex[2][PART_LEN1]) {
   int i;
   for (i = 0; i < PART_LEN; i += 4) {
     const float32x4x2_t vec_data = vld2q_f32(&data[2 * i]);
     vst1q_f32(&data_complex[0][i], vec_data.val[0]);
@@ skipping 12 matching lines @@
                                  float xfw[2][PART_LEN1],
                                  float* fft,
                                  float* cohde,
                                  float* cohxd,
                                  int* extreme_filter_divergence) {
   int i;
 
   SmoothedPSD(aec, efw, dfw, xfw, extreme_filter_divergence);
 
   {
-    const float32x4_t vec_1eminus10 =  vdupq_n_f32(1e-10f);
+    const float32x4_t vec_1eminus10 = vdupq_n_f32(1e-10f);
 
     // Subband coherence
     for (i = 0; i + 3 < PART_LEN1; i += 4) {
       const float32x4_t vec_sd = vld1q_f32(&aec->sd[i]);
       const float32x4_t vec_se = vld1q_f32(&aec->se[i]);
       const float32x4_t vec_sx = vld1q_f32(&aec->sx[i]);
       const float32x4_t vec_sdse = vmlaq_f32(vec_1eminus10, vec_sd, vec_se);
       const float32x4_t vec_sdsx = vmlaq_f32(vec_1eminus10, vec_sd, vec_sx);
       float32x4x2_t vec_sde = vld2q_f32(&aec->sde[i][0]);
       float32x4x2_t vec_sxd = vld2q_f32(&aec->sxd[i][0]);
@@ skipping 22 matching lines @@
 void WebRtcAec_InitAec_neon(void) {
   WebRtcAec_FilterFar = FilterFarNEON;
   WebRtcAec_ScaleErrorSignal = ScaleErrorSignalNEON;
   WebRtcAec_FilterAdaptation = FilterAdaptationNEON;
   WebRtcAec_OverdriveAndSuppress = OverdriveAndSuppressNEON;
   WebRtcAec_SubbandCoherence = SubbandCoherenceNEON;
   WebRtcAec_StoreAsComplex = StoreAsComplexNEON;
   WebRtcAec_PartitionDelay = PartitionDelayNEON;
   WebRtcAec_WindowData = WindowDataNEON;
 }