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| 1 /* | |
| 2 * libjingle | |
| 3 * Copyright 2011 Google Inc. | |
| 4 * | |
| 5 * Redistribution and use in source and binary forms, with or without | |
| 6 * modification, are permitted provided that the following conditions are met: | |
| 7 * | |
| 8 * 1. Redistributions of source code must retain the above copyright notice, | |
| 9 * this list of conditions and the following disclaimer. | |
| 10 * 2. Redistributions in binary form must reproduce the above copyright notice, | |
| 11 * this list of conditions and the following disclaimer in the documentation | |
| 12 * and/or other materials provided with the distribution. | |
| 13 * 3. The name of the author may not be used to endorse or promote products | |
| 14 * derived from this software without specific prior written permission. | |
| 15 * | |
| 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
| 17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
| 18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO | |
| 19 * EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | |
| 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | |
| 21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; | |
| 22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | |
| 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | |
| 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF | |
| 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
| 26 */ | |
| 27 | |
| 28 #include "talk/media/base/cpuid.h" | |
| 29 | |
| 30 #include <iostream> | |
| 31 | |
| 32 #include "webrtc/base/basictypes.h" | |
| 33 #include "webrtc/base/gunit.h" | |
| 34 #include "webrtc/base/systeminfo.h" | |
| 35 | |
| 36 TEST(CpuInfoTest, CpuId) { | |
| 37 LOG(LS_INFO) << "ARM: " | |
| 38 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasARM); | |
| 39 LOG(LS_INFO) << "NEON: " | |
| 40 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasNEON); | |
| 41 LOG(LS_INFO) << "X86: " | |
| 42 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasX86); | |
| 43 LOG(LS_INFO) << "SSE2: " | |
| 44 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE2); | |
| 45 LOG(LS_INFO) << "SSSE3: " | |
| 46 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSSE3); | |
| 47 LOG(LS_INFO) << "SSE41: " | |
| 48 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41); | |
| 49 LOG(LS_INFO) << "SSE42: " | |
| 50 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE42); | |
| 51 LOG(LS_INFO) << "AVX: " | |
| 52 << cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasAVX); | |
| 53 bool has_arm = cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasARM); | |
| 54 bool has_x86 = cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasX86); | |
| 55 EXPECT_FALSE(has_arm && has_x86); | |
| 56 } | |
| 57 | |
| 58 TEST(CpuInfoTest, IsCoreIOrBetter) { | |
| 59 bool core_i_or_better = cricket::IsCoreIOrBetter(); | |
| 60 // Tests the function is callable. Run on known hardware to confirm. | |
| 61 LOG(LS_INFO) << "IsCoreIOrBetter: " << core_i_or_better; | |
| 62 | |
| 63 // All Core I CPUs have SSE 4.1. | |
| 64 if (core_i_or_better) { | |
| 65 EXPECT_TRUE(cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41)); | |
| 66 EXPECT_TRUE(cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSSE3)); | |
| 67 } | |
| 68 | |
| 69 // All CPUs that lack SSE 4.1 are not Core I CPUs. | |
| 70 if (!cricket::CpuInfo::TestCpuFlag(cricket::CpuInfo::kCpuHasSSE41)) { | |
| 71 EXPECT_FALSE(core_i_or_better); | |
| 72 } | |
| 73 } | |
| 74 | |
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