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1 /* | 1 /* |
2 * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved. | 2 * Copyright (c) 2013 The WebRTC project authors. All Rights Reserved. |
3 * | 3 * |
4 * Use of this source code is governed by a BSD-style license | 4 * Use of this source code is governed by a BSD-style license |
5 * that can be found in the LICENSE file in the root of the source | 5 * that can be found in the LICENSE file in the root of the source |
6 * tree. An additional intellectual property rights grant can be found | 6 * tree. An additional intellectual property rights grant can be found |
7 * in the file PATENTS. All contributing project authors may | 7 * in the file PATENTS. All contributing project authors may |
8 * be found in the AUTHORS file in the root of the source tree. | 8 * be found in the AUTHORS file in the root of the source tree. |
9 */ | 9 */ |
10 | 10 |
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313 u[PART_LEN][1] = 0; | 313 u[PART_LEN][1] = 0; |
314 | 314 |
315 for (i = 0; i < PART_LEN1; i++) { | 315 for (i = 0; i < PART_LEN1; i++) { |
316 // Use average NLP weight for H band | 316 // Use average NLP weight for H band |
317 comfortNoiseHband[i][0] = tmpAvg * u[i][0]; | 317 comfortNoiseHband[i][0] = tmpAvg * u[i][0]; |
318 comfortNoiseHband[i][1] = tmpAvg * u[i][1]; | 318 comfortNoiseHband[i][1] = tmpAvg * u[i][1]; |
319 } | 319 } |
320 } | 320 } |
321 } | 321 } |
322 | 322 |
323 void WebRtcAec_FilterFar_mips(AecCore* aec, float yf[2][PART_LEN1]) { | 323 void WebRtcAec_FilterFar_mips( |
| 324 int num_partitions, |
| 325 int xfBufBlockPos, |
| 326 float xfBuf[2][kExtendedNumPartitions * PART_LEN1], |
| 327 float wfBuf[2][kExtendedNumPartitions * PART_LEN1], |
| 328 float yf[2][PART_LEN1]) { |
324 int i; | 329 int i; |
325 for (i = 0; i < aec->num_partitions; i++) { | 330 for (i = 0; i < num_partitions; i++) { |
326 int xPos = (i + aec->xfBufBlockPos) * PART_LEN1; | 331 int xPos = (i + xfBufBlockPos) * PART_LEN1; |
327 int pos = i * PART_LEN1; | 332 int pos = i * PART_LEN1; |
328 // Check for wrap | 333 // Check for wrap |
329 if (i + aec->xfBufBlockPos >= aec->num_partitions) { | 334 if (i + xfBufBlockPos >= num_partitions) { |
330 xPos -= aec->num_partitions * (PART_LEN1); | 335 xPos -= num_partitions * (PART_LEN1); |
331 } | 336 } |
332 float* yf0 = yf[0]; | 337 float* yf0 = yf[0]; |
333 float* yf1 = yf[1]; | 338 float* yf1 = yf[1]; |
334 float* aRe = aec->xfBuf[0] + xPos; | 339 float* aRe = xfBuf[0] + xPos; |
335 float* aIm = aec->xfBuf[1] + xPos; | 340 float* aIm = xfBuf[1] + xPos; |
336 float* bRe = aec->wfBuf[0] + pos; | 341 float* bRe = wfBuf[0] + pos; |
337 float* bIm = aec->wfBuf[1] + pos; | 342 float* bIm = wfBuf[1] + pos; |
338 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13; | 343 float f0, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11, f12, f13; |
339 int len = PART_LEN1 >> 1; | 344 int len = PART_LEN1 >> 1; |
340 | 345 |
341 __asm __volatile ( | 346 __asm __volatile ( |
342 ".set push \n\t" | 347 ".set push \n\t" |
343 ".set noreorder \n\t" | 348 ".set noreorder \n\t" |
344 "1: \n\t" | 349 "1: \n\t" |
345 "lwc1 %[f0], 0(%[aRe]) \n\t" | 350 "lwc1 %[f0], 0(%[aRe]) \n\t" |
346 "lwc1 %[f1], 0(%[bRe]) \n\t" | 351 "lwc1 %[f1], 0(%[bRe]) \n\t" |
347 "lwc1 %[f2], 0(%[bIm]) \n\t" | 352 "lwc1 %[f2], 0(%[bIm]) \n\t" |
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715 float err_th2 = error_threshold * error_threshold; | 720 float err_th2 = error_threshold * error_threshold; |
716 float f0, f1, f2; | 721 float f0, f1, f2; |
717 #if !defined(MIPS32_R2_LE) | 722 #if !defined(MIPS32_R2_LE) |
718 float f3; | 723 float f3; |
719 #endif | 724 #endif |
720 | 725 |
721 __asm __volatile ( | 726 __asm __volatile ( |
722 ".set push \n\t" | 727 ".set push \n\t" |
723 ".set noreorder \n\t" | 728 ".set noreorder \n\t" |
724 "1: \n\t" | 729 "1: \n\t" |
725 "lwc1 %[f0], 0(%[x_pow]) \n\t" | 730 "lwc1 %[f0], 0(%[x_pow]) \n\t" |
726 "lwc1 %[f1], 0(%[ef0]) \n\t" | 731 "lwc1 %[f1], 0(%[ef0]) \n\t" |
727 "lwc1 %[f2], 0(%[ef1]) \n\t" | 732 "lwc1 %[f2], 0(%[ef1]) \n\t" |
728 "add.s %[f0], %[f0], %[fac1] \n\t" | 733 "add.s %[f0], %[f0], %[fac1] \n\t" |
729 "div.s %[f1], %[f1], %[f0] \n\t" | 734 "div.s %[f1], %[f1], %[f0] \n\t" |
730 "div.s %[f2], %[f2], %[f0] \n\t" | 735 "div.s %[f2], %[f2], %[f0] \n\t" |
731 "mul.s %[f0], %[f1], %[f1] \n\t" | 736 "mul.s %[f0], %[f1], %[f1] \n\t" |
732 #if defined(MIPS32_R2_LE) | 737 #if defined(MIPS32_R2_LE) |
733 "madd.s %[f0], %[f0], %[f2], %[f2] \n\t" | 738 "madd.s %[f0], %[f0], %[f2], %[f2] \n\t" |
734 #else | 739 #else |
735 "mul.s %[f3], %[f2], %[f2] \n\t" | 740 "mul.s %[f3], %[f2], %[f2] \n\t" |
736 "add.s %[f0], %[f0], %[f3] \n\t" | 741 "add.s %[f0], %[f0], %[f3] \n\t" |
737 #endif | 742 #endif |
738 "c.le.s %[f0], %[err_th2] \n\t" | 743 "c.le.s %[f0], %[err_th2] \n\t" |
739 "nop \n\t" | 744 "nop \n\t" |
740 "bc1t 2f \n\t" | 745 "bc1t 2f \n\t" |
741 " nop \n\t" | 746 " nop \n\t" |
742 "sqrt.s %[f0], %[f0] \n\t" | 747 "sqrt.s %[f0], %[f0] \n\t" |
743 "add.s %[f0], %[f0], %[fac1] \n\t" | 748 "add.s %[f0], %[f0], %[fac1] \n\t" |
744 "div.s %[f0], %[err_th], %[f0] \n\t" | 749 "div.s %[f0], %[err_th], %[f0] \n\t" |
745 "mul.s %[f1], %[f1], %[f0] \n\t" | 750 "mul.s %[f1], %[f1], %[f0] \n\t" |
746 "mul.s %[f2], %[f2], %[f0] \n\t" | 751 "mul.s %[f2], %[f2], %[f0] \n\t" |
747 "2: \n\t" | 752 "2: \n\t" |
748 "mul.s %[f1], %[f1], %[mu] \n\t" | 753 "mul.s %[f1], %[f1], %[mu] \n\t" |
749 "mul.s %[f2], %[f2], %[mu] \n\t" | 754 "mul.s %[f2], %[f2], %[mu] \n\t" |
750 "swc1 %[f1], 0(%[ef0]) \n\t" | 755 "swc1 %[f1], 0(%[ef0]) \n\t" |
751 "swc1 %[f2], 0(%[ef1]) \n\t" | 756 "swc1 %[f2], 0(%[ef1]) \n\t" |
752 "addiu %[len], %[len], -1 \n\t" | 757 "addiu %[len], %[len], -1 \n\t" |
753 "addiu %[x_pow], %[x_pow], 4 \n\t" | 758 "addiu %[x_pow], %[x_pow], 4 \n\t" |
754 "addiu %[ef0], %[ef0], 4 \n\t" | 759 "addiu %[ef0], %[ef0], 4 \n\t" |
755 "bgtz %[len], 1b \n\t" | 760 "bgtz %[len], 1b \n\t" |
756 " addiu %[ef1], %[ef1], 4 \n\t" | 761 " addiu %[ef1], %[ef1], 4 \n\t" |
757 ".set pop \n\t" | 762 ".set pop \n\t" |
758 : [f0] "=&f" (f0), [f1] "=&f" (f1), [f2] "=&f" (f2), | 763 : [f0] "=&f" (f0), [f1] "=&f" (f1), [f2] "=&f" (f2), |
759 #if !defined(MIPS32_R2_LE) | 764 #if !defined(MIPS32_R2_LE) |
760 [f3] "=&f" (f3), | 765 [f3] "=&f" (f3), |
761 #endif | 766 #endif |
762 [x_pow] "+r" (x_pow), [ef0] "+r" (ef0), [ef1] "+r" (ef1), | 767 [x_pow] "+r" (x_pow), [ef0] "+r" (ef0), [ef1] "+r" (ef1), |
763 [len] "+r" (len) | 768 [len] "+r" (len) |
764 : [fac1] "f" (fac1), [err_th2] "f" (err_th2), [mu] "f" (mu), | 769 : [fac1] "f" (fac1), [err_th2] "f" (err_th2), [mu] "f" (mu), |
765 [err_th] "f" (error_threshold) | 770 [err_th] "f" (error_threshold) |
766 : "memory" | 771 : "memory" |
767 ); | 772 ); |
768 } | 773 } |
769 | 774 |
770 void WebRtcAec_InitAec_mips(void) { | 775 void WebRtcAec_InitAec_mips(void) { |
771 WebRtcAec_FilterFar = WebRtcAec_FilterFar_mips; | 776 WebRtcAec_FilterFar = WebRtcAec_FilterFar_mips; |
772 WebRtcAec_FilterAdaptation = WebRtcAec_FilterAdaptation_mips; | 777 WebRtcAec_FilterAdaptation = WebRtcAec_FilterAdaptation_mips; |
773 WebRtcAec_ScaleErrorSignal = WebRtcAec_ScaleErrorSignal_mips; | 778 WebRtcAec_ScaleErrorSignal = WebRtcAec_ScaleErrorSignal_mips; |
774 WebRtcAec_ComfortNoise = WebRtcAec_ComfortNoise_mips; | 779 WebRtcAec_ComfortNoise = WebRtcAec_ComfortNoise_mips; |
775 WebRtcAec_OverdriveAndSuppress = WebRtcAec_OverdriveAndSuppress_mips; | 780 WebRtcAec_OverdriveAndSuppress = WebRtcAec_OverdriveAndSuppress_mips; |
776 } | 781 } |
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