arm64: clang assembler compatability

dl/sp/src/arm/arm64/armSP_FFT_CToC_FC32_Radix2_s.S

 //
 //  Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
 //
 //  Use of this source code is governed by a BSD-style license
 //  that can be found in the LICENSE file in the root of the source
 //  tree. An additional intellectual property rights grant can be found
 //  in the file PATENTS.  All contributing project authors may
 //  be found in the AUTHORS file in the root of the source tree.
 //
 //  This is a modification of armSP_FFT_CToC_SC32_Radix2_unsafe_s.s
@@ skipping 52 matching lines @@
 #define pointStep32     w9
 #define grpCount        x10
 #define grpCount32      w10
 #define setCount        x13
 #define step            x15
 #define dstStep         x11
 
 // Neon Registers
 
 #define dW      v0.2s
+#define dWs     v0.s
 #define dX0     v2.2s
 #define dX1     v3.2s
 #define dX2     v4.2s
 #define dX3     v5.2s
 #define dY0     v6.2s
 #define dY1     v7.2s
 #define dY2     v8.2s
 #define dY3     v9.2s
 #define qT0     v10.2s
 #define qT1     v11.2s
@@ skipping 45 matching lines @@
 
 
         // point0: dX0-real part dX1-img part
         LD2    {dX0,dX1},[pSrc],pointStep
         // point1: dX2-real part dX3-img part
         LD2    {dX2,dX3},[pSrc],step
 
         SUBS    setCount,setCount,#2
 
         .ifeqs  "\inverse", "TRUE"
-            fmul   qT0,dX2,dW[0]
-            fmla   qT0,dX3,dW[1]                       // real part
-            fmul   qT1,dX3,dW[0]
-            fmls   qT1,dX2,dW[1]                       // imag part
+            fmul   qT0,dX2,dWs[0]
+            fmla   qT0,dX3,dWs[1]                       // real part
+            fmul   qT1,dX3,dWs[0]
+            fmls   qT1,dX2,dWs[1]                       // imag part
 
         .else
 
-            fmul   qT0,dX2,dW[0]
-            fmls   qT0,dX3,dW[1]                       // real part
-            fmul   qT1,dX3,dW[0]
-            fmla   qT1,dX2,dW[1]                       // imag part
+            fmul   qT0,dX2,dWs[0]
+            fmls   qT0,dX3,dWs[1]                       // real part
+            fmul   qT1,dX3,dWs[0]
+            fmla   qT1,dX2,dWs[1]                       // imag part
 
         .endif
 
         fsub    dY0,dX0,qT0
         fsub    dY1,dX1,qT1
         fadd    dY2,dX0,qT0
         fadd    dY3,dX1,qT1
 
         st2    {dY0,dY1},[pDst],outPointStep
         // dstStep = -outPointStep + 16
@@ skipping 17 matching lines @@
         M_END
 
 
 
         M_START armSP_FFTInv_CToC_FC32_Radix2_OutOfPlace,,d11
         FFTSTAGE "FALSE","TRUE",INV
         M_END
 
 
         .end