arm64: clang assembler compatability

dl/sp/src/arm/arm64/armSP_FFTInv_CCSToR_F32_preTwiddleRadix2_s.S

 //
 //  Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
 //
 //  Use of this source code is governed by a BSD-style license
 //  that can be found in the LICENSE file in the root of the source
 //  tree. An additional intellectual property rights grant can be found
 //  in the file PATENTS.  All contributing project authors may
 //  be found in the AUTHORS file in the root of the source tree.
 //
 //  This is a modification of
@@ skipping 93 matching lines @@
 
 #define dY2     v4.2s
 #define dY3     v5.2s
 #define dW0     v6.2s
 #define dW1     v7.2s
 #define dW0Tmp  v10.2s
 #define dW1Neg  v11.2s
 
 #define dZip    v19.2s
 #define dZip8b  v19.8b
-#define half    v13.2s
+#define half    v13.s
 
         .macro FFTSTAGE scaled, inverse, name
 
-        fmov    half, 0.5
+        fmov    v13.2s, 0.5

[Raymond Toy (Google), 2015/10/30 22:38:46]

This makes it really hard to follow that half below actually contains 0.5.  Try
to reuse half or change the definition or add a new one.

[Riku Voipio, 2015/11/02 12:24:12]

Likewise, will keep half as it used be and use halfs

 
         asr     size, subFFTNum, #1           // preserve the contents of N = subFFTNum
         lsl     step, subFFTNum, #2           // step = N/2 * 8 bytes
 
 
         // Z(k) = 1/2 {[F(k) +  F'(N/2-k)] +j*W^(-k) [F(k) -  F'(N/2-k)]}
         // Note: W^(k) is stored as negated value and also need to
         // conjugate the values from the table
 
         // Z(0) : no need of twiddle multiply
@@ skipping 142 matching lines @@
 
 decrementScale\name :
 
         .endm
 
         M_START armSP_FFTInv_CCSToR_F32_preTwiddleRadix2,,d15
             FFTSTAGE "FALSE","TRUE",Inv
         M_END
 
         .end