Chromium Code Reviews| Index: webrtc/base/atomicops.h |
| diff --git a/webrtc/base/atomicops.h b/webrtc/base/atomicops.h |
| index 80b212444305143229b0de5bc54f4bbaa0c7ddeb..416f6e66fe46047d078f7be2005e496facc5ad42 100644 |
| --- a/webrtc/base/atomicops.h |
| +++ b/webrtc/base/atomicops.h |
| @@ -19,6 +19,10 @@ |
| #include <winsock2.h> |
| #include <windows.h> |
| #endif // defined(WEBRTC_WIN) |
| +#if defined(THREAD_SANITIZER) |
| +#include <sanitizer/tsan_interface_atomic.h> |
| +#include <stdint.h> |
| +#endif // defined(THREAD_SANITIZER) |
| namespace rtc { |
| class AtomicOps { |
| @@ -31,10 +35,10 @@ class AtomicOps { |
| static int Decrement(volatile int* i) { |
| return ::InterlockedDecrement(reinterpret_cast<volatile LONG*>(i)); |
| } |
| - static int Load(volatile const int* i) { |
| + static int AcquireLoad(volatile const int* i) { |
| return *i; |
| } |
| - static void Store(volatile int* i, int value) { |
| + static void ReleaseStore(volatile int* i, int value) { |
| *i = value; |
| } |
| static int CompareAndSwap(volatile int* i, int old_value, int new_value) { |
| @@ -49,14 +53,32 @@ class AtomicOps { |
| static int Decrement(volatile int* i) { |
| return __sync_sub_and_fetch(i, 1); |
| } |
| - static int Load(volatile const int* i) { |
| - // Adding 0 is a no-op, so const_cast is fine. |
| - return __sync_add_and_fetch(const_cast<volatile int*>(i), 0); |
| +#if defined(THREAD_SANITIZER) |
| + // TSan doesn't understand the __sync_synchronize barrier used below. These |
| + // versions are supplied to prevent false-positive data races. |
| + static int32_t AcquireLoad(volatile const int32_t* i) { |
|
Alexander Potapenko
2015/07/22 12:57:37
It's better for TSan and non-TSan versions of thes
pbos-webrtc
2015/07/22 13:04:40
I need the compiler to pick 32/64 bit depending on
Alexander Potapenko
2015/07/22 13:10:08
Yeah, I was saying the latter. Or you can explicit
|
| + return __tsan_atomic32_load(i, __tsan_memory_order_acquire); |
| } |
| - static void Store(volatile int* i, int value) { |
| + static int64_t AcquireLoad(volatile const int64_t* i) { |
| + return __tsan_atomic64_load(i, __tsan_memory_order_acquire); |
| + } |
| + static void ReleaseStore(volatile int32_t* i, int32_t value) { |
| + __tsan_atomic32_store(i, value, __tsan_memory_order_release); |
| + } |
| + static void ReleaseStore(volatile int64_t* i, int64_t value) { |
| + __tsan_atomic64_store(i, value, __tsan_memory_order_release); |
| + } |
| +#else |
| + static int AcquireLoad(volatile const int* i) { |
| + int value = *i; |
| + __sync_synchronize(); |
| + return value; |
| + } |
| + static void ReleaseStore(volatile int* i, int value) { |
| __sync_synchronize(); |
| *i = value; |
| } |
| +#endif |
| static int CompareAndSwap(volatile int* i, int old_value, int new_value) { |
| return __sync_val_compare_and_swap(i, old_value, new_value); |
| } |